The SPIE Advanced Lithography conference is globally recognized as the preeminent event providing up-to-the minute information about critical lithography issues and advancements. The 2015 event delivered on those expectations with many presentations focusing on the complexity and cost of advancing lithography. In case you weren’t able to attend the conference or were unable to attend all of the numerous technical sessions offered, we’ve compiled an overview of key topics around the annual lithography convention as reported through various media channels.
The jam-packed SPIE week got underway with a number of expert updates at the 2015 LithoVision event on Sunday. Dan Hutcheson of VLSIresearch discussed the LithoVision presentations in the March 6 edition of The Chip Insider®, and excerpts of his comments are included below.
Janice Golda of Intel Corporation focused on “Semiconductor Industry Drivers.” She really threw down the gauntlet for the rest of the industry, saying Intel believes “true cost reduction is still possible.”
Dr. Harry Levinson of GLOBALFOUNDRIES concluded with the point that it’s getting more difficult. That lithography beyond 10nm will be challenging for overlay, CD control, and defects…
Ryoichi Kawaguchi gave Nikon’s Roadmap: Nikon sees optical being quite viable down to 5nm, which was pretty much confirmed by the above speakers. Variants of Self-Aligned Dual Patterning from SADP to SAQP and then SAOP plus cut masks or multiples from LELE (LEx2) to LEx3 to LEx4 will make this possible. Their models show it will be cost competitive with EUV…
Yuichi Shibazaki of Nikon stated that with today’s scanners, lens heat and reticle heat is the most dominant factor determining on-product CDU and OL results…Thus, feed-forward is critical, where the system uses the previous lot as a control with computational layer setup for the next lot. Metrology is a must in order to do on-product learning that can be fed-forward to the next lot. They’ve done this and achieved an amazing On-Product-Overlay figure of less than 3nm.
Kevin Lucas of Synopsys did a deep dive into EDA and the ramifications of lithography trends. Most important is that EDA-OPC options for designers have been increasing rapidly. Back at 28nm we thought 5 options was a lot…They are looking at 21 options for 10nm and 71+ for 7nm. Obviously, EDA suppliers have their work cut out for them. He made a call for better partnering with resist manufacturers of exposure models…
Mark Smith of KLA-Tencor confirmed that computational lithography is moving to manufacturing. He sees a need for more computational patterning to better understand and control sources of non-uniformities.”
LithoVision was followed by in-depth SPIE technical presentations that continued through late in the day on Thursday. Complexity, cost issues, and EUV challenges featured heavily throughout SPIE and surrounding media. Selections from various outlets are included below.
2/24/15: Robert Maire of Semiconductor Advisors, LLC reported:
“Economics enters the picture: Everything always comes down to the final arbiter of money. This year at SPIE there is clearly more talk about the cost of EUV versus multi-patterning. There was a good presentation of the cost of HiNA (high numerical aperture) EUV versus multi-patterning. We have suggested in the past that there should be an economic crossover point from multi-patterning where the EUV production decision becomes clear but it sounds as if that line is blurring a bit. Part of the reason is that the delay in EUV has caused other complications that may confuse the simple economic choice for EUV. One example is the need for multi-patterning in EUV anyway by the time it gets to HVM, thereby taking away one of the positive attributes…
Infrastructure not ready: The “ecosystem” for EUV is further behind than EUV itself and will clearly limit the introduction of EUV whenever it really becomes available. This is not new news as we have been talking about it for a long time and the problem has not changed nor have there been any changes in the significant participants….”
via SemiWiki.com
2/25/15: Jeff Dorsch of Semiconductor Manufacturing and Design reported that “Nikon’s champion machine is the NSR-S630D immersion scanner, which was touted throughout the LithoVision event. The system is capable of exposing 250 wafers per hour, according to Nikon’s Yuichi Shibazaki…Ryoichi Kawaguchi of Nikon told attendees, ‘EUV lithography needs more stability and improvement.’ He also brought up the topic of manufacturing on 450-millimeter wafers, which has mostly gone ignored in the lithography competition. Nikon will ship a 450mm system this spring to the Global 450 Consortium in Albany, N.Y., Kawaguchi said. The bigger substrates could provide ‘an alternative option to reduce cost,’ he added.
Erik Byers of Micron Technology observed, ‘EUV is not a panacea.’
Which lithography technology will prevail in high-volume manufacturing? The question may not be definitively answered for some time.”
via semimd.com
3/3/15: Mark LaPedus of Semiconductor Engineering reported: “ ‘In order to be cost effective with immersion triple patterning, we are going to need source power somewhere between 350 and 400 Watts,’ said Harry Levinson, senior fellow and director of strategic lithography technology at GLOBALFOUNDRIES. ‘So there needs to be substantial progress of the EUV light sources to make EUV lithography cost effective against triple patterning.’
On the bright side, EUV could simplify the patterning process, as compared to optical. But chipmakers may require EUV with multiple patterning at 7nm and beyond, which could add more cost to the equation.”
3/19/15: Separately, Mark LaPedus reported: “…it’s unclear if EUV will be ready for 7nm amid ongoing delays with the power source. There are other limitations. Using a 13.5nm wavelength, EUV enables resolutions down to 22nm half-pitch. So, to pattern features at both 7nm and 5nm, EUV would require multiple patterning. ‘If you bring EUV into the picture, it helps some for 7nm. But it is not a total solution for 7nm,’ said Pawitter Mangat, senior manager and deputy director for EUV lithography at GLOBALFOUNDRIES. ‘Even for 5nm at 0.33 NA, EUV is not going to cut it. You need high NA.’ In theory, a high NA lens would improve EUV resolutions. But it may also require the photomask industry to move to a new 9-inch mask size. Today, the standard mask size is 6-inch. Needless to say, the mask industry lacks the resources to move to a new reticle size.”
3/19/15: Mark LaPedus also reported “N. Hayashi (Dai Nippon Printing) commented: ‘For EUV we need an EUV-specific infrastructure, such as actinic inspection. But there is not enough investment to develop those kinds of things. So that’s a problem in the mask world.’
P. Mangat (GLOBALFOUNDRIES): ‘In addition, let’s do the mask blank supply calculation for EUV with the present infrastructure. If EUV goes into high-volume manufacturing in the next two years, people might have to bid on a good mask blank and say, “I am willing to pay so many thousands of dollars for it.” There are only one or two suppliers for it. There might be only a limited number of volumes for blanks with high-quality yields.’
N. Hayashi: ‘Plus, even if the blank supplier could improve their process, they still cannot see the defects.’ ”
via semiengineering.com
SPIE Advanced Lithography continues to be a highlight of our industry, and many advancements as well as opportunities for the future were revealed at the 2015 conference. It was evident that litho complexity and cost will be increasingly challenging, making industry collaboration and innovation imperative to achieving next-generation manufacturing objectives.